523bbf7065
This was added for Metal, but also gives good results with CUDA and OptiX.
Also enable it for future Apple GPUs instead of only M1 and M2, since this has
been shown to help across multiple GPUs so the better bet seems to enable
rather than disable it.
Also moves some of the logic outside of the Metal device code, and always
enables the code in the kernel since other devices don't do dynamic compile.
Time per sample with OptiX + RTX A6000:
new old
barbershop_interior 0.0730s 0.0727s
bmw27 0.0047s 0.0053s
classroom 0.0428s 0.0464s
fishy_cat 0.0102s 0.0108s
junkshop 0.0366s 0.0395s
koro 0.0567s 0.0578s
monster 0.0206s 0.0223s
pabellon 0.0158s 0.0174s
sponza 0.0088s 0.0100s
spring 0.1267s 0.1280s
victor 0.0524s 0.0531s
wdas_cloud 0.0817s 0.0816s
Ref D15331, T87836
207 lines
9.3 KiB
C
207 lines
9.3 KiB
C
/* SPDX-License-Identifier: Apache-2.0
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* Copyright 2011-2022 Blender Foundation */
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#pragma once
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#include "kernel/types.h"
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#include "util/atomic.h"
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CCL_NAMESPACE_BEGIN
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/* Control Flow
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*
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* Utilities for control flow between kernels. The implementation is different between CPU and
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* GPU devices. For the latter part of the logic is handled on the host side with wavefronts.
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*
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* There is a main path for regular path tracing camera for path tracing. Shadows for next
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* event estimation branch off from this into their own path, that may be computed in
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* parallel while the main path continues. Additionally, shading kernels are sorted using
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* a key for coherence.
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*
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* Each kernel on the main path must call one of these functions. These may not be called
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* multiple times from the same kernel.
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*
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* integrator_path_init(kg, state, next_kernel)
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* integrator_path_next(kg, state, current_kernel, next_kernel)
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* integrator_path_terminate(kg, state, current_kernel)
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*
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* For the shadow path similar functions are used, and again each shadow kernel must call
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* one of them, and only once.
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*/
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ccl_device_forceinline bool integrator_path_is_terminated(ConstIntegratorState state)
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{
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return INTEGRATOR_STATE(state, path, queued_kernel) == 0;
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}
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ccl_device_forceinline bool integrator_shadow_path_is_terminated(ConstIntegratorShadowState state)
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{
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return INTEGRATOR_STATE(state, shadow_path, queued_kernel) == 0;
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}
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#ifdef __KERNEL_GPU__
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ccl_device_forceinline void integrator_path_init(KernelGlobals kg,
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IntegratorState state,
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const DeviceKernel next_kernel)
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{
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atomic_fetch_and_add_uint32(&kernel_integrator_state.queue_counter->num_queued[next_kernel], 1);
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INTEGRATOR_STATE_WRITE(state, path, queued_kernel) = next_kernel;
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}
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ccl_device_forceinline void integrator_path_next(KernelGlobals kg,
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IntegratorState state,
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const DeviceKernel current_kernel,
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const DeviceKernel next_kernel)
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{
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atomic_fetch_and_sub_uint32(&kernel_integrator_state.queue_counter->num_queued[current_kernel],
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1);
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atomic_fetch_and_add_uint32(&kernel_integrator_state.queue_counter->num_queued[next_kernel], 1);
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INTEGRATOR_STATE_WRITE(state, path, queued_kernel) = next_kernel;
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}
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ccl_device_forceinline void integrator_path_terminate(KernelGlobals kg,
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IntegratorState state,
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const DeviceKernel current_kernel)
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{
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atomic_fetch_and_sub_uint32(&kernel_integrator_state.queue_counter->num_queued[current_kernel],
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1);
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INTEGRATOR_STATE_WRITE(state, path, queued_kernel) = 0;
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}
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ccl_device_forceinline IntegratorShadowState integrator_shadow_path_init(
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KernelGlobals kg, IntegratorState state, const DeviceKernel next_kernel, const bool is_ao)
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{
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IntegratorShadowState shadow_state = atomic_fetch_and_add_uint32(
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&kernel_integrator_state.next_shadow_path_index[0], 1);
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atomic_fetch_and_add_uint32(&kernel_integrator_state.queue_counter->num_queued[next_kernel], 1);
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INTEGRATOR_STATE_WRITE(shadow_state, shadow_path, queued_kernel) = next_kernel;
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return shadow_state;
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}
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ccl_device_forceinline void integrator_shadow_path_next(KernelGlobals kg,
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IntegratorShadowState state,
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const DeviceKernel current_kernel,
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const DeviceKernel next_kernel)
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{
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atomic_fetch_and_sub_uint32(&kernel_integrator_state.queue_counter->num_queued[current_kernel],
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1);
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atomic_fetch_and_add_uint32(&kernel_integrator_state.queue_counter->num_queued[next_kernel], 1);
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INTEGRATOR_STATE_WRITE(state, shadow_path, queued_kernel) = next_kernel;
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}
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ccl_device_forceinline void integrator_shadow_path_terminate(KernelGlobals kg,
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IntegratorShadowState state,
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const DeviceKernel current_kernel)
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{
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atomic_fetch_and_sub_uint32(&kernel_integrator_state.queue_counter->num_queued[current_kernel],
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1);
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INTEGRATOR_STATE_WRITE(state, shadow_path, queued_kernel) = 0;
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}
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/* Sort first by truncated state index (for good locality), then by key (for good coherence). */
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# define INTEGRATOR_SORT_KEY(key, state) \
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(key + kernel_data.max_shaders * (state / kernel_integrator_state.sort_partition_divisor))
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ccl_device_forceinline void integrator_path_init_sorted(KernelGlobals kg,
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IntegratorState state,
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const DeviceKernel next_kernel,
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const uint32_t key)
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{
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const int key_ = INTEGRATOR_SORT_KEY(key, state);
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atomic_fetch_and_add_uint32(&kernel_integrator_state.queue_counter->num_queued[next_kernel], 1);
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INTEGRATOR_STATE_WRITE(state, path, queued_kernel) = next_kernel;
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INTEGRATOR_STATE_WRITE(state, path, shader_sort_key) = key_;
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atomic_fetch_and_add_uint32(&kernel_integrator_state.sort_key_counter[next_kernel][key_], 1);
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}
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ccl_device_forceinline void integrator_path_next_sorted(KernelGlobals kg,
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IntegratorState state,
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const DeviceKernel current_kernel,
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const DeviceKernel next_kernel,
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const uint32_t key)
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{
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const int key_ = INTEGRATOR_SORT_KEY(key, state);
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atomic_fetch_and_sub_uint32(&kernel_integrator_state.queue_counter->num_queued[current_kernel],
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1);
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atomic_fetch_and_add_uint32(&kernel_integrator_state.queue_counter->num_queued[next_kernel], 1);
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INTEGRATOR_STATE_WRITE(state, path, queued_kernel) = next_kernel;
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INTEGRATOR_STATE_WRITE(state, path, shader_sort_key) = key_;
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atomic_fetch_and_add_uint32(&kernel_integrator_state.sort_key_counter[next_kernel][key_], 1);
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}
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#else
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ccl_device_forceinline void integrator_path_init(KernelGlobals kg,
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IntegratorState state,
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const DeviceKernel next_kernel)
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{
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INTEGRATOR_STATE_WRITE(state, path, queued_kernel) = next_kernel;
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}
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ccl_device_forceinline void integrator_path_init_sorted(KernelGlobals kg,
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IntegratorState state,
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const DeviceKernel next_kernel,
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const uint32_t key)
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{
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INTEGRATOR_STATE_WRITE(state, path, queued_kernel) = next_kernel;
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(void)key;
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}
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ccl_device_forceinline void integrator_path_next(KernelGlobals kg,
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IntegratorState state,
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const DeviceKernel current_kernel,
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const DeviceKernel next_kernel)
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{
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INTEGRATOR_STATE_WRITE(state, path, queued_kernel) = next_kernel;
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(void)current_kernel;
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}
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ccl_device_forceinline void integrator_path_terminate(KernelGlobals kg,
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IntegratorState state,
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const DeviceKernel current_kernel)
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{
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INTEGRATOR_STATE_WRITE(state, path, queued_kernel) = 0;
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(void)current_kernel;
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}
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ccl_device_forceinline void integrator_path_next_sorted(KernelGlobals kg,
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IntegratorState state,
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const DeviceKernel current_kernel,
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const DeviceKernel next_kernel,
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const uint32_t key)
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{
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INTEGRATOR_STATE_WRITE(state, path, queued_kernel) = next_kernel;
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(void)key;
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(void)current_kernel;
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}
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ccl_device_forceinline IntegratorShadowState integrator_shadow_path_init(
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KernelGlobals kg, IntegratorState state, const DeviceKernel next_kernel, const bool is_ao)
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{
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IntegratorShadowState shadow_state = (is_ao) ? &state->ao : &state->shadow;
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INTEGRATOR_STATE_WRITE(shadow_state, shadow_path, queued_kernel) = next_kernel;
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return shadow_state;
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}
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ccl_device_forceinline void integrator_shadow_path_next(KernelGlobals kg,
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IntegratorShadowState state,
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const DeviceKernel current_kernel,
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const DeviceKernel next_kernel)
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{
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INTEGRATOR_STATE_WRITE(state, shadow_path, queued_kernel) = next_kernel;
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(void)current_kernel;
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}
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ccl_device_forceinline void integrator_shadow_path_terminate(KernelGlobals kg,
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IntegratorShadowState state,
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const DeviceKernel current_kernel)
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{
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INTEGRATOR_STATE_WRITE(state, shadow_path, queued_kernel) = 0;
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(void)current_kernel;
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}
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#endif
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CCL_NAMESPACE_END
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